Huawei Technologies announced on Monday that its next‑generation high‑end chips will reach a transistor density comparable to a 1.4 nm process within five years, a milestone the Chinese giant says will help neutralise the pressure of long‑standing US sanctions. The claim, made at a semiconductor symposium in Shanghai, signals an aggressive shift away from the traditional race to shrink transistors and towards a new architecture that could keep China’s AI ambitions alive despite limited access to the world’s most advanced lithography tools.
The disclosed target is bold: 1.4 nm is expected to sit at the frontier of global chip‑making by the end of the decade. While Huawei did not release independent benchmark data, the roadmap suggests the company believes it can compete with the likes of Taiwan’s TSMC, which presently ships 2 nm wafers and plans mass production of a 1.4 nm node by 2028. Achieving a comparable density without the latest extreme‑ultraviolet (EUV) machines would require a fundamentally different approach—exactly what Huawei is banking on with its “Tau Scaling Law.”
In the current landscape, China’s chip industry faces a steep uphill climb. US export controls have barred Chinese firms from buying the EUV lithography equipment essential for sub‑3 nm production, forcing domestic players to rely on older immersion tools. This technological gap has made the “system‑level efficiency” strategy central to Beijing’s semiconductor policy, and Huawei’s announcement appears to put that policy into practice.
Tau Scaling Law promises system‑level efficiency gains
Huawei’s Tau Scaling Law pivots the industry’s focus from merely shrinking transistors to cutting the time it takes signals and data to travel across a chip. By redesigning interconnect pathways and reducing latency, the law aims to boost performance and chip density even on older manufacturing nodes. The company says the principle underpins its upcoming LogicFolding architecture, slated for inclusion in the Kirin chips slated for launch later this year.
He Hui, director of semiconductor research at Omdia, explained the shift: “What Huawei is proposing is a move from traditional node‑driven scaling to system‑level efficiency scaling. Shortening interconnects and lowering latency is a credible way to squeeze more performance when leading‑edge lithography is constrained.”
If the approach delivers, it could give Chinese AI models—such as DeepSeek’s flagship V4, already running on Huawei’s Ascend series—access to competitive compute power without relying on the most advanced foreign fabs.
How Huawei’s roadmap stacks up against global leaders
| Chipmaker | Current node (2024) | Planned node (2028) | Target density equivalent |
|---|---|---|---|
| TSMC | 2 nm | 1.4 nm (mass production) | 1.4 nm |
| Samsung | 3 nm | 2 nm (pilot) | 2 nm |
| Intel | 4 nm (Intel 4) | 2 nm (Intel 3) | 2 nm |
| Huawei (target) | 7 nm (via SMIC) | 1.4 nm equivalent (2029) | 1.4 nm |
The table shows that Huawei’s ambition aligns it with the very front‑line of global process technology, despite currently producing chips on SMIC’s 7 nm line.
The takeaway is clear: Huawei is positioning itself to leapfrog traditional node scaling, aiming for a performance parity that could narrow the gap with industry giants.
While the Tau Scaling Law is still unproven at scale, Huawei’s track record of engineering workarounds offers some credibility. After being placed on the US trade blacklist in 2019, the company entered an “extreme survival mode,” launching a secret backup chip project led by He Tingbo. That effort bore fruit in 2023 with the 5G‑capable Mate 60 series, powered by a SMIC‑produced 7 nm system‑on‑chip—a surprising comeback that surprised many analysts.
SMIC’s share price jumped 7.6 % on the day Huawei unveiled its LogicFolding architecture, underscoring market optimism that the partnership could finally deliver home‑grown, high‑performance silicon. Domestic tech firms have already shown a growing appetite for Ascend chips, seeking alternatives to US‑based Nvidia GPUs, which remain off‑limits to Chinese customers due to export bans.
Nvidia’s chief executive, Jensen Huang, recently conceded that Huawei is now the dominant player in China’s AI chip market, a sentiment echoed by industry insiders who see Huawei’s roadmap as the most viable path for Chinese AI compute in the near term.
The stakes extend beyond commercial success. Frontier semiconductor technology has become a strategic asset for national security and economic growth. As Beijing pushes for self‑reliance, breakthroughs like the Tau Scaling Law could reshape global supply chains, reducing China’s dependence on foreign lithography equipment and potentially altering the balance of power in the tech arena.
Huawei’s latest claims also dovetail with a broader roadmap released in October, outlining a long‑term development plan for AI‑focused Ascend processors. The document signals a concerted effort to build a domestic ecosystem that can rival the performance of Western and Taiwanese fabs, even if the path involves unorthodox design philosophies.
In the next few months, industry watchers will be looking for silicon samples, performance benchmarks, and evidence that the LogicFolding architecture can deliver the promised latency reductions. Should Huawei succeed, the ripple effect could see Chinese AI startups accelerating their product cycles, while global chipmakers may be forced to rethink the primacy of node shrinkage as the sole driver of progress.
The announcement marks a decisive moment in the ongoing semiconductor tug‑of‑war. Whether Huawei’s system‑level scaling can truly bridge the gap left by US export controls remains to be seen, but the firm’s bold target and the market’s enthusiastic response suggest that the race for AI‑ready silicon is far from over.